Parallel processors are becoming increasingly important because of limitations in clock speed and the need to reduce power consumption by computing resources. One challenging aspect of parallel processor design is providing distributed control to multiple processing elements from a single program. In some cases, SIMD processors distribute control to multiple processing resources through a single, usually wide, instruction word. The disadvantage of wide instruction words is that program memory is increased proproportionally to the instruction bit width, which in turn increases power consumption and cost.
Conventional methods for reducing the width of the instruction word include processing element decoders which allow the digital control logic to "tree out" at the expense of limiting the size of the instruction set for the processing elements. The general advantage of using processing element decoders is that the SIMD instruction word does not have to include all of the digital control logic for each processing element, and therefore the width of the SIMD instruction word is substantially shorter. The specific advantages of processing element decoding include increased program memory efficiency and increased routability.
However, unmodifiable processing element decoders also have a serious disadvantage. While all possible combinations of control lines are not required, the size limitation of the instruction set may be too restrictive. This is particularly true in the case of cross bar switches which may have a very large number of combinations. Crossbar switches are required in general purpose parallel processors to provide the necessary signal routing. A limited instruction set can therefore severely restrict the allowable functions that can be performed by the processing elements. Flexibility can be greatly increased by allowing the processing element decoders to be configured using an instruction decoder control specification. Currently, no methods exist for dynamically allocating instructions to these stores upon assembly or compilation of a program targeted for a SIMD processor.
Thus, what is needed is a method for programming SIMD processors without resorting to wide program words, while still maintaining the flexibility to perform all the functions supported by the processing elements in the processor. In order to achieve this result, a method is needed to dynamically allocate instructions to programmable processing element decoders within a SIMD processor.